This invention relates to a power switching transistor drive circuit and, more particularly, to a power switching transistor drive circuit capable having a diminishing power loss at turn off and turn on, and of shortened storage time.
A drive circuit for a power switching transistor, which is used in, e.g., switching-type stabilized power supplies relying upon pulse-width modulation, is required to effect switching at a high frequency owing to the demand for smaller power supplies. If the power switching transistor is merely turned on and off, repeatedly, a greater number of times in view of the need for higher frequency, the power loss due to switching will increase. Furthermore, the power switching transistor has an operating delay, during which storage time control can no longer be carried out. Specifically, the transistor possesses a control dead time. Since the dead time is fixed, a rise in the switching rate increases the proportion of dead time in terms of time and narrows the range of control effected by the pulse width modulation operation. To realize the higher frequency, therefore, various circuits have been proposed and put into practical use in pursuit of reduced power loss during the on/off operation of power switching transistors, as well as a shorter storage time.
FIG. 1 is a circuit diagram of a power switching transistor drive circuit according to the prior art. In the Figure, PAP represents a preamplifier which current-amplifies a pulse signal Pi, serving as a control signal, applied thereto, for supplying a pulse current to the primary coil of a power transistor, described later. QL represents a power switching transistor, BSC a base circuit for driving the power switching transistor QL, and PT a pulse transformer for electromagnetically coupling the preamplifier PAP and base circuit BSC.
In the drive circuit, the preamplifier PAP receives the current-amplifies the pulse signal Pi and supplies the primary coil of the pulse transformer PT with a pulse current IP. Meanwhile, the base circuit BSC drives the power transistor QL into conduction by a pulse current IS generated in the secondary coil in response to the pulse current IP. At this time, however, a current charging a speed-up capacitor CB in the base circuit is added as a base current, so that the base current temporarily grows large in magnitude and the turn-on time of the transistor QL shortens. When the power switching transistor QL turns on, a Baker clamping diode DB clamps the transistor QL to a state just prior to saturation, thereby functioning to prevent over-drive. When the pulse signal Pi subsequently vanishes, the pulse current IP ceases to flow, the electromagnetic energy which has accumulated in the primary coil of the pulse transformer PT is released in the form of a flyback voltage and a reverse voltage is generated in the secondary coil of the pulse transformer PT to reverse bias the transistor QL. Now the charge which has accumulated in the capacitor CB also is released, in the direction indicated by the dashed-line arrow, so that, in conjunction with the action of the Baker clamping diode DB, the storage time of the transistor QL is shortened and the on/off operation is hastened.
Thus, with the drive circuit of FIG. 1, storage time can be shortened considerably in comparison with the hitherto available art. The effect, however, is less than satisfactory.
Accordingly, an object of the present invention is to provide a novel drive circuit, particularly a preamplifier, capable of shortening storage time sufficiently and of reducing power loss at turn-on and turn-off.